Engineer Enea: Optimised high voltage 0.35µm CMOS transistors available as foundry process

Optimised high voltage 0.35µm CMOS transistors available as foundry process

The full service foundry division of ams has added the H35 process to its platform. The 0.35µm high voltage CMOS process is said to offer voltage scalable transistors, allowing area and performance improvements.

The transistors are optimised for drain-source voltage levels ranging from 20V to 100V, with significantly lower on-resistance. According to ams, an optimised 30V NMOS transistor in power management applications can replace a fixed 50V transistor, with an area saving of about 50%. Meanwhile, a 60V optimised NMOS device requires 22% less area than a standard 120V NMOS transistor. By using less area, foundry customers can benefit from more dice per wafer, ams points out.

Area optimised devices are suited to a range of applications, including MEMS drivers, motor drivers, switches and power management ICs.

“Being among first foundries worldwide offering true voltage scalable devices, proves ams’ expertise in developing speciality high voltage CMOS processes and in providing excellent manufacturing services,” said Markus Wuchse, general manager of ams’ full service foundry division. “Our hitkit, the ams benchmark Process Design Kit, as well as our high voltage process expertise, enable our partners to optimise their HV integrated circuits towards area and on-resistance, which immediately results in more dice per wafer.”

The H35 process expands the company’s ‘More Than Silicon’ portfolio, which provides a package of technology modules, IP, cell libraries, engineering consultancy and services to help customers develop advanced analogue and mixed signal circuits.